+++ This PCR was initially created as a clone of PCR #16759 +++

Description:

On PowerPC processors the kernel maps all addresses that are uncached or
write-through as "Guarded" to prevent processor speculative accesses.  One way
such addresses arise is from calling attachPlatformResource() on platform
resources that are "Cache Disabled" or "Write-Through Cached".  Such platform
resources are typically used for Memory Mapped Devices.  Note: "Guarded" refers
to the G in the PowerPC WIMG virtual address attributes.

On PowerPC processors with Book-E based cores the guarded attribute prevents
speculative data accesses, but does not prevent speculative instruction fetches.
Preventing speculative instruction fetches from a page requires that the page is
mapped as "no-execute", which the kernel does not do.

For addresses mapped as executable, the PowerPC Book-E specification does not
constrain when instruction prefetches may occur or from what addresses.  Since
the kernel maps all virtual addresses as executable, theoretically the processor
may perform an instruction prefetch from any memory mapped address.  Speculative
instruction fetches are naturally aligned 32-bit word reads.

A read from an address that has a side effect, e.g., clearing a device status,
or causing an exception could, theoretically, occur at any time in a process
with such virtual addresses mapped.

Note: As of the writing of this PCR, this limitation has not been reported
in any fielded systems.  It was discovered by analysis based on processor
specifications.

Some examples of the effects of a read:
 1. read completes normally with no side-effect, 
 2. read completes normally but cause a device state change, e.g. reading from
    a serial device’s receive register,
 3. read does not complete normally and causes an exception, e.g., machine
    check.

Memory can be mapped uncached or write-through cached by:

    - At hyperstart image creation time using the -memoryRegionswitch with the attribute set to writethrough or cacheOff.
    - During kernel cold start by a PAL or PRL calling mapPhysicalAddress[64]() with caching set to  cachingWriteThrough or cachingOff.
    - At runtime by application software calling attachPlatformResource[AtAddress](), readFromPlatformResource(), mapViewOfPlatformResource(), or computeCrc32PlatformResource() with resourceName set to the name of a memoryMappedResource configured in the registry with cacheMode set to writeThru or off.

Workaround:

None.

This limitation affects The following verified Kernel versions: 7.6.1, 7.6.2, 7.10.6, 8.3.2, 8.4.2, 10.8.0
 
Note: 
- 7.6.1 is the first kernel SAS that supports a book-e processor
- 9.2.3 SAS only lists arm