MPC 5566: Difference between revisions
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{{:Category:MPC_NIC_FEC}} | {{:Category:MPC_NIC_FEC}} | ||
= Processor specific notes = | = MPC5566 Processor specific notes = | ||
On-chip flash supports read while write/erase. Claims to be | On-chip flash supports read while write/erase. Claims to be | ||
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== Issues == | == Issues == | ||
*FLASH starts at physical address zero. Ref MPC5566 Microcontroller Reference Manual, section 1.6 MPC5500 Family Memory Map | *FLASH starts at physical address zero. Ref [http://www.freescale.com/files/32bit/doc/ref_manual/MPC5566RM.pdf?fpsp=1 MPC5566 Microcontroller Reference Manual], section 1.6 MPC5500 Family Memory Map | ||
* External RAM is limited to 512MB. | * External RAM is limited to 512MB. | ||
* VLE requires TLB bit setting. | * VLE requires TLB bit setting. | ||
Revision as of 22:41, 21 December 2009
- misc: 128KB SRAM, 3MB FLASH, 2 ETPUs, VLE
- Core: e200z6
- Cache: 32KB, unified, virtually indexed.
The Freescale e200 core family encompasses a number of specific cores. The claim is that they are all e500 binary compatible. See Freescale’s e200 Core Family
E200 cores are used in slow processors, make sure Deos customers understand that performance is not going to be stellar.
Some of the E200 cores support Variable Length Encoding (VLE) for instructions. Deos does not support VLE.
The floating point is SPE based (uses GPRs). This requires SW support to emulate true IEEE floating point math.
The e200z6 core supports 32-bit floating point in hardware. It does not support 64-bit floating point in hardware. SW support is required for 64-bit emulation. There is currently no Deos emulation software available.
This processor does not have machine check support.
BSP
Note that only the 416 BGA package has an FEC!
Network Controller: FEC
The Fast Ethernet Controller (FEC) supports 10 or 100mb/sec. The Deos driver for this is currently unavailable. We have an Agave vintage beta driver as part of the lite5200 BSP.
- DMA based, requires firmware download.
- Deos Driver: Beta, level E (from lite5200 BSP)
MPC5566 Processor specific notes
On-chip flash supports read while write/erase. Claims to be optimized, so perhaps execute from flash would perform acceptably.
Issues
- FLASH starts at physical address zero. Ref MPC5566 Microcontroller Reference Manual, section 1.6 MPC5500 Family Memory Map
- External RAM is limited to 512MB.
- VLE requires TLB bit setting.
- Interrupt controller has multiple vectors and priorities.
- Has JTAG support, not sure if OA supports this processor.
